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DATA SHEET
MOS INTEGRATED CIRCUIT
PD16874
QUAD Pch HIGH-SIDE SWITCH FOR USB
DESCRIPTION
The PD16874 is a power switch IC with an overcurrent limiter that is used for the power bus of a Universal Serial Bus (USB). This product has Pch power MOSFET circuits, each of which has a low-on resistance (100 m TYP.), in its switching block. In addition, the IC is also equipped with an overcurrent detector that is essential for a host/hub controller conforming to the USB Standard, so that the IC can report an overcurrent to the controller. Moreover, a thermal shutdown circuit and an undervoltage lockout circuit are also provided as the protection circuits of the IC. This product has four channels of power switches, control input pins, and flag output pins to simultaneously control four USB ports with a single IC.
FEATURES
* * * * * * * Four P-ch power MOSFET circuits Overcurrent detector that outputs active-low control signal from detection report pin Overcurrent limiter to prevent system voltage drop Thermal shutdown circuit Undervoltage lockout circuit Each of four circuits can be turned on and off independently of the others by a control pin. (CTL input: active low) 16-pin SOP package
ORDERING INFORMATION
Part Number Package 16-pin SOP (7.62 mm (300))
PD16874GS
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. S13894EJ1V0DS00 (1st edition) Date Published February 2001 N CP(K) Printed in Japan
(c)
2001
PD16874
BLOCK DIAGRAM
IN (Input) 1 OUT1 2 (Output 1) 15 OUT2 (Output 2)
Reference voltage Overcurrent detection To VDDC pin
Reference voltage Gate control Gate control Overcurrent detection To VDDC pin
FLG1 3 (Flag output 1)
14 FLG2 (Flag output 2)
CTL1 4 (Control input 1) Thermal shutdown circuit CTL3 5 (Control input 3) To VDDC pin Undervoltage lockout circuit To VDDC pin
13 CTL2 (Control input 2)
12 CTL4 (Control input 4)
FLG3 6 (Flag output 3)
11 FLG4 (Flag output 4)
Overcurrent detection Reference voltage
Gate control
Gate control
Overcurrent detection Reference voltage
OUT3 (Output 3)
7 9 VDDC (USB controller power supply) 8 IN (Input) 16 GND
10
OUT4 (Output 4)
NOTES ON CORRECT USE
* No internal resistor is connected to input pins CTL1 (pin 4), CTL2 (pin 13), CTL3 (pin 5), and CTL4 (pin 12). When using the PD16874, therefore, be sure to set the voltage level of these input pins to "H" or "L". * Keep the IN pins (pins 1 and 8) at the same potential. * Supply a voltage lower than that supplied to the IN pins (pins 1and 8) to VDDC (pin 9). * FLG1 (pin 3), FLG2 (pin 14), FLG3 (pin 6), and FLG4 (pin 11) are internally pulled up to VDDC (USB controller supply voltage) (resistance: approx. 400 k). Therefore, no external pull-up resistor has to be connected to these pins.
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Data Sheet S13894EJ1V0DS
PD16874
PIN CONFIGURATION (Top View)
IN OUT1 FLG1 CTL1 CTL3 FLG3 OUT3 IN
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
GND OUT2 FLG2 CTL2 CTL4 FLG4 OUT4 VDDC
16-pin SOP
PIN DESCRIPTION
Pin No. 4/5/12/13 3/6/11/14 16 1/8 9 2/7/10/15 Pin Name CTL1/CTL2/CTL3/CTL4 FLG1/FLG2/FLG3/FLG4 GND IN VDDC OUT1/OUT2/OUT3/OUT4 Pin Function Control input (See the truth table below). TTL input Detection flag (output): Active-low, Nch open-drain Ground Power input: Source of MOSFET for output. Power supply to internal circuitry of IC USB controller power supply. Each FLG output is connected via internal resistor. Switch output: Drain of MOSFET for output. Usually, connected to load.
TRUTH TABLE (H: High level, L: Low level, ON: Output on, OFF: Output off, X: H or L)
CTLn (In) L H H (all) L X X FLGn (Out) H H H (all) L L (all) L (all) OUTn (Out) ON OFF OFF (all) ON OFF (all) OFF (all) OUTn ON OUTn OFF Standby mode OUTn overcurrent detection Thermal shutdown circuit operation Undervoltage lockout circuit operation Operation mode
Data Sheet S13894EJ1V0DS
3
PD16874
ABSOLUTE MAXIMUM RATINGS (Unless otherwise specified, TA = 25C)
Parameter Input voltage Flag voltage Flag current Output voltage Output current Symbol VIN VFLG IFLG VOUT IOUT DC Conditions Ratings -0.3 to +6 -0.3 to +6 50 VIN+0.3 +0.5 (VIN = VCTL = 5 V) -0.1 (VIN = 0 V, VOUT = 5 V) Pulse width Single 100 s pulse Control input Total power dissipation
Note 1
Unit V V mA V A
+3 -0.3 to +6 900 -40 to +85 +150 -55 to +150 V mW C C C
VCTL PD TA TCH MAX Tstg
Operating temperature range Junction temperature Storage temperature
Note 2
Notes
1. When mounted on a glass epoxy board measuring 90 mm x 90 mm x 1.6 mm thick 2. This product has an internal thermal shutdown circuit (operating temperature: 150C or higher TYP.)
RECOMMENDED OPERATING RANGE (Unless otherwise specified, TA = 25C)
Parameter Input voltage Operating temperature range Symbol VIN TA MIN. +4 0 TYP. MAX. +5.5 +70 Unit V C
ELECTRICAL SPECIFICATIONS DC Characteristics (Unless otherwise specified, VIN = +5 V, TA = +25C)
Parameter Current consumption Symbol IDD Conditions VCTL = VIN (all CTL pins), OUT: Open VCTL = 0 V, OUT: open Input voltage, low Input voltage, high Control input current VIL VIH ICTL CTL pin CTL pin VCTL = 0 V VCTL = VIN Output MOSFET on-resistance Output leakage current Overcurrent detector threshold Flag output resistance Flag leakage current Undervoltage lockout circuit operating voltage RON IO LEAK ITH RON F IO LEAK F VUVLO TA = 0 to +70C IL = 10 mA VFLAG = 5 V VIN: When rising VIN: When falling Hysteresis width 2.2 2.0 0.05 0.6 0.9 10 0.01 2.5 2.3 TA = 0 to +70C, IOUT = 500 mA 2.0 0.01 0.01 100 1 1 140 10 1.25 25 1 2.8 2.6 0.25 MIN. TYP. 1 MAX. 5 150 1.0 Unit
A A
V V
A A
m
A
A
A
V V V
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Data Sheet S13894EJ1V0DS
PD16874
ELECTRICAL SPECIFICATIONS AC Characteristics (Unless otherwise specified, VIN = +5 V, TA = +25C)
Parameter Output transition rise time (ON) Output transition fall time (OFF) Overcurrent detection delay time Overcurrent detection output rise time Minimum CTL high time Symbol tRISE tFALL tOVER tSRISE tCTL RL = 10 per output CTL : LHL 2.5 20 Conditions RL = 10 per output RL = 10 per output 20 5 8 MIN. 2.5 TYP. 5 MAX. 8 10 Unit ms
s s
ms
s
POINTS OF MEASUREMENT Output Transition Rise Time (ON)/Output Transition Fall Time (OFF)
CTL pin: HL/LH
5 V/3.3 V CTL 0V tRISE 5V VOUT 0V tFALL 90%
90%
90% 10%
Overcurrent Detection Delay Time/Minimum CTL High Time
IOUT
ITH
VOUT
tOVER tSRISE (Internal time) FLG 90%
tCTL CTL 10% 10%
Data Sheet S13894EJ1V0DS
5
PD16874
DESCRIPTION OF FUNCTIONS 1. Overcurrent Detection
This IC detects an overcurrent in a range of 0.6 to 1.25 A (0.9 A TYP.) (the USB Standard defines that an overcurrent is 0.5 A MAX.). When the IC detects an overcurrent, the FLG pin goes low (active) and reports the result of detection to the control IC. At this time, the switch is kept ON and the current limiter is activated. In this way, an overcurrent status that lasts for a long time can be prevented. By deasserted the CTL pin inactive by the control IC, the switch is turned OFF and the FLG pin goes back high. Therefore, the CTL signal must be deasserted inactive as soon as the controller IC has detected that the FLG pin has gone low, to avoid overheating this IC. Once the switch has been turned OFF, it turns back ON again only when the CTL signal is asserted active while the FLG pin is high. To prevent an inrush current being detected by mistake, a deadband time (overcurrent detection delay time) is set to elapse before the overcurrent detector is activated. The duration of this deadband time is 20 s TYP. While the overcurrent limiter is activated, the power consumption of the device may abruptly increase. As a result, the junction temperature may also rise. Make sure that the CTL signal is deasserted inactive and that the switch is turned OFF before the absolute maximum rating is exceeded.
2. Undervoltage Lockout Circuit (UVLO)
This circuit prevents malfunctioning of the switch due to fluctuation in supply voltage. When power is turned on (2.5 V or less TYP.) or off (2.3 V or less TYP.), the OUT and FLG pins have the following status: OUT: OFF FLG: "L" (= 0 V)
5V
Output voltage
2.3 V
2.5 V
5V
Input voltage
The above figure does not show the actual waveform. For the related characteristic waveform, refer to Major Characteristic Curves.
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Data Sheet S13894EJ1V0DS
PD16874
3. Behavior When Power is Turned ON/OFF
This IC performs a soft-start operation on power application. This is to prevent an overcurrent from flowing through the IC on power application while the high-capacity capacitor connected to the output pin is charged. Power ON: Power OFF: Soft start (2.5 to 8 ms) No control (10 s MAX.)
5V Vin 0V 2.5 ms MIN. 8 ms MAX. 5V Vout 0V 10 s MAX.
The above figure does not show the actual waveform. For the related characteristic waveform, refer to Major Characteristic Curves.
Data Sheet S13894EJ1V0DS
7
PD16874
OPERATION SEQUENCE Power ON/OFF
5V IN (Input) GND 5V OUT (Output) GND 5V Flg (Output) GND 5V 5V CTL (Input) GND
Overcurrent detection threshold Iout
Note If the CTL signal is asserted active after power has been turned ON, OUT executes the soft-start operation (output transition time: 8 ms MAX.). In addition, FLG output is fixed to "L" if the supply voltage is lower than the operating voltage of the undervoltage lockout circuit (UVLO) on power application. If all the CTL pins are inactive when power is supplied, the IC enters the standby status (IDD = 5 A MAX.).
When Control Signals Are Input
5V IN (Input) GND 5V OUT (Output) GND 5V GND 5V GND
FLG (Output) CTL (Input)
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Data Sheet S13894EJ1V0DS
PD16874
On Detection of Overcurrent
5V IN (Input) 5V Flg (Output) GND 5V CTL (Input) GND 5V OUT (Output) GND
IOUT
Overcurrent detection threshold
When overcurrent (inrush current) is detected
Slow start period
When overcurrent is detected (output is short-circuited)
If an overcurrent is detected after the overcurrent detection delay time of 20 s, the IC executes a slow-start operation again. If an overcurrent is detected while the IC is executing the slow-start operation again, it is assumed that the output is short-circuited and the FLG pin goes low. When the CTL signal is deasserted inactive, OUT is turned OFF and FLG goes high. If the CTL signal is asserted active, OUT is turned back ON unless the undervoltage lockout circuit or thermal shutdown circuit is activated.
Data Sheet S13894EJ1V0DS
9
PD16874
When Thermal Shutdown Circuit Operates
5V IN (Input) GND 5V OUT (Output) GND 5V GND 5V CTL (Input) GND Standby status Non-standby status
FLG (Output)
Tch
Thermal shutdown circuit operating temperature (rising)
Thermal shutdown circuit operating temperature (falling)
While the thermal shutdown circuit is activated, the output pins are in the OFF status. However, the IC does not enter the standby status even if all the CLT pins are deasserted inactive at the same time. The thermal shutdown circuit is not activated even if the junction temperature exceeds 150C TYP. while the IC is in the standby mode (when all the CTL pins are inactive).
TEST CIRCUIT
+5 V
1 10 2 3 4 5 6 10 7 8
IN OUT1 FLG1 CTL1 CTL3 FLG3 OUT3 IN
GND 16 OUT2 15 FLG2 14 CTL2 13 CTL4 12 FLG4 11 OUT4 10 VDDC 9 10 10
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Data Sheet S13894EJ1V0DS
PD16874
MAJOR CHARACTERISTIC CURVES (Unless otherwise specified, TA = +25C, VIN = +5 V)
Total Power Dissipation PT vs. Ambient Temperature TA 1200
Total consumption PT (mW)
900 600 300 0 -40
0
40
80
120
160
200
Ambient temperature TA (C) Output On-Resistance RON vs. Ambient Temperature TA
Output on-resistance RON (m) Output on-resistance RON (m)
Output On-Resistance RON vs. Supply Voltage VIN 140 120 100 80 60 40 20 0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
140 120 100 80 60 40 20 0 -20 0 20 40 60 80
Ambient temperature TA (C) Current Consumption IDD vs. Ambient Temperature TA
Current consumption ( A)
Supply voltage (V)
Current Consumption IDD vs. Supply Voltage VIN
Current consumption ( A)
180 160 140 120 100 80 20 0 -20 0 20 40 60 80
140 120 100 80 20 0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
Ambient temperature TA (C)
Current consumption in standby mode ( A)
Supply voltage (V)
Current consumption in standby mode ( A)
Current Consumption (Standby) IDD vs. Ambient Temperature TA 0.10 0.08 0.06 0.04 0.02 0.00 -20 0 20 40 60 80
Current Consumption (Standby) IDD vs. Supply Voltage VIN 0.10 0.08 0.06 0.04 0.02 0.00 3.5 4.0 4.5 5.0 5.5 6.0 6.5
Ambient temperature TA (C)
Supply voltage (V)
Data Sheet S13894EJ1V0DS
11
PD16874
MAJOR CHARACTERISTIC CURVES (Unless otherwise specified, TA = +25C, VIN = +5 V)
Input Voltage VI vs. Ambient Temperature TA 1.80 1.70 Input Voltage VI vs. Supply Voltage VIN
Input voltage, low VIL (V) Input voltage, high VIH (V)
1.70 1.60 1.50 1.40 1.30 -20 0 20 VIL
Input voltage, low VIL (V) Input voltage, high VIH (V)
VIH
1.65 1.60 1.55 1.50 3.5
VIH
VIL 4.0 4.5 5.0 5.5 6.0 6.5
40
60
80
Ambient temperature TA (C) Overcurrent Threshold ITH vs. Ambient Temperature TA
Supply voltage (V)
Overcurrent Threshold ITH vs. Supply Voltage VIN
Overcurrent detection value (A)
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -20 0 20 40 60 80
Overcurrent detection value (A)
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
Ambient temperature TA (C) Output Rise Delay Time Characteristics 6 6
Supply voltage (V) Output Fall Delay Time Characteristics
Voltage (V)
Voltage (V)
5 4 3 2 1 0 0
Input voltage
5 4 3 2 1 0 Output voltage
Output voltage
1
2
3
4
0
0.4 Time ( s)
0.8
1.2
Undervoltage lockout circuit operating voltage VUVLO (V)
Time ( s) Undervoltage Lockout Circuit Operating Voltage Characteristics 50 40 UVLO (L H) 30 20 10 00 -20 0 UVLO (H L)
20
40
60
80
Ambient temperature TA (C)
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Data Sheet S13894EJ1V0DS
PD16874
APPLICATION CIRCUIT
3.3 V D+ DIN VDDC 1 F 150 F VBUS D+ D- 150 F GND 5V VBUS D+ D- GND
USB controller
Enable
GND
CTL1 CTL2 OUT1 CTL3 CTL4 OUT2 FLG1
Over current
FLG2 OUT3 FLG3 FLG4 OUT4 VBUS 150 F D+ D- GND
PD16874
VBUS 150 F D+ D- GND USB connector
Data Sheet S13894EJ1V0DS
13
PD16874
PACKAGE DRAWING
16-PIN PLASTIC SOP (7.62 mm (300))
16 9 detail of lead end
P
1 A
8
F G S B N C D E M
M
H I J
L K
S
NOTE Each lead centerline is located within 0.12 mm of its true position (T.P.) at maximum material condition.
ITEM A B C D E F G H I J K L M N P
MILLIMETERS 10.20.2 0.78 MAX. 1.27 (T.P.) 0.42 +0.08 -0.07 0.10.1 1.650.15 1.55 7.70.3 5.60.2 1.10.2 0.22 +0.08 -0.07 0.60.2 0.12 0.10 3 +7 -3 P16GM-50-300B-6
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Data Sheet S13894EJ1V0DS
PD16874
RECOMMENDED SOLDERING CONDITIONS
The PD16874 should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended, contact your NEC sales representative. Surface Mount Type For the details of the recommended soldering conditions, refer to the document Semiconductor Device Mounting Technology Manual (C10535E).
PD16874GS
Soldering Method Infrared reflow VPS Wave soldering Partial heating Soldering Conditions Package peak temperature: 235C, Time: 30 sec. Max. (at 210C or higher), Note Count: two times, Exposure limit: Not limited Package peak temperature: 215C, Time: 40 sec. Max. (at 200C or higher), Note Count: two times, Exposure limit: Not limited Solder bath temperature: 260C Max., Time: 10 sec. Max., Count: once, Note Exposure limit: not limited Pin temperature: 300C Max., Time: 3 sec. Max., Exposure limit: not limited
Note
Recommended Condition Symbol IR35-00-2 VP15-00-2 WS60-00-1
Note After opening the dry pack, store it at 25C or less and 65% RH or less for the allowable storage period. Cautions Do not use different soldering methods together (except for partial heating).
REFERENCE
Quality Grades on NEC semiconductor Devices Semiconductor Device Mounting Technology Manual NEC Semiconductor Device Reliability/Quality Control System Semiconductor Selection Guide C11531E C10535E C10983E X10679X
Data Sheet S13894EJ1V0DS
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PD16874
[MEMO]
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Data Sheet S13894EJ1V0DS
PD16874
[MEMO]
Data Sheet S13894EJ1V0DS
17
PD16874
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
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Data Sheet S13894EJ1V0DS
PD16874
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC product in your application, pIease contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify:
* * * * *
Device availability Ordering information Product release schedule Availability of related technical literature Development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, AC supply voltages, and so forth) Network requirements
*
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country.
NEC Electronics Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288
NEC Electronics (Germany) GmbH
Benelux Office Eindhoven, The Netherlands Tel: 040-2445845 Fax: 040-2444580
NEC Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
NEC Electronics Hong Kong Ltd. NEC Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-30-67 58 00 Fax: 01-30-67 58 99 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
NEC Electronics (Germany) GmbH
Duesseldorf, Germany Tel: 0211-65 03 02 Fax: 0211-65 03 490
NEC Electronics (France) S.A. NEC Electronics (UK) Ltd.
Milton Keynes, UK Tel: 01908-691-133 Fax: 01908-670-290 Madrid Office Madrid, Spain Tel: 91-504-2787 Fax: 91-504-2860
NEC Electronics Singapore Pte. Ltd.
United Square, Singapore Tel: 65-253-8311 Fax: 65-250-3583
NEC Electronics Taiwan Ltd. NEC Electronics Italiana s.r.l.
Milano, Italy Tel: 02-66 75 41 Fax: 02-66 75 42 99
NEC Electronics (Germany) GmbH
Scandinavia Office Taeby, Sweden Tel: 08-63 80 820 Fax: 08-63 80 388
Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951
NEC do Brasil S.A.
Electron Devices Division Guarulhos-SP Brasil Tel: 55-11-6462-6810 Fax: 55-11-6462-6829
J00.7
Data Sheet S13894EJ1V0DS
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